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Linaro Connect San Diego 2019 has ended
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Please add your presentation to your session by attaching a pdf file to your session (under Manage Session > + Add Presentation). We will export these presentations daily and feature on the connect.linaro.org website here. Videos will be uploaded as we receive them (if the video of your session cannot be published please let us know immediately by emailing connect@linaro.org).

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HPC [clear filter]
Tuesday, September 24
 

2:00pm PDT

SAN19-224 Status of Lustre on ARM platforms
Discuss the work done to enable native ARM support for the Lustre file system. Cover what needs to be done as well as how to get involved.

Tuesday September 24, 2019 2:00pm - 2:25pm PDT
Sunset 3 (Session 3)
 
Thursday, September 26
 

11:00am PDT

SAN19-409 An Update on Astra - Experiences running the First Petascale ARM Supercomputer
The Vanguard program looks to expand the potential technology choices for leadership class High Performance Computing (HPC) platforms. The first deployment of Vanguard is Astra, a Petascale ARM supercomputer sited at Sandia National Laboratories. Astra is the first and currently largest ARM Supercomputer and looks to prototype the ARM ecosystem not only for the NNSA/DOE but also the greater HPC community. This talk will first discuss on the architectural details of Astra, as well as the Advanced Tri-Lab Software Environment (ATSE) which provides an overview of the software and hardware platform. Then, we will share the latest activities in performance results, scalability studies, and lessons learned thus far. We expect this will help inform the greater HPC community on the viability of the ARM ecosystem.

Speakers
avatar for Andrew Younge

Andrew Younge

Sandia National Laboratories, Sandia National Laboratories
Andrew J. Younge is a Computer Scientist in the Scalable System Software department at Sandia National Laboratories. Andrew currently serves as the Lead PI for the Supercontainers project under the DOE Exascale Computing Project and is a key contributor to the Astra system, the world's... Read More →


Thursday September 26, 2019 11:00am - 11:25am PDT
Pacific Room (Keynote)

11:30am PDT

SAN19-412 Investigating generated code for HPC applications on AArch64 by GCC and LLVM
Recently, compiler optimizations and their improvements for AArch64 have been actively added to GCC and LLVM. For optimizations for HPC applications, GCC with a Fortran front end is superior to LLVM. In this presentation, we compare the code generated by GCC and LLVM for kernel parts of HPC applications on AArch64, and investigate the current problems of LLVM and propose solutions for them.

Speakers
avatar for Masaki Arai

Masaki Arai

Senior Researcher, FUJITSU LABORATORIES LTD.
In 1992, He joined Fujitsu Laboratories Ltd. His research interests are in the area of compiler optimizations and computer architectures. He joined Linaro as member engineer in 2017.



Thursday September 26, 2019 11:30am - 11:55am PDT
Pacific Room (Keynote)

12:00pm PDT

SAN19-417 Performance Engineering for Arm Supercomputers
Arm and its partners are rapidly gaining ground in high performance computing with supercomputers based on Arm’s server-class IP (a.k.a. Neoverse) in production at leadership computing facilities worldwide. An unprecedented number of open source and commercial HPC software developers are actively tuning their applications for these new platforms. This presentation expands on the “Arm in HPC” keynote to encourage growth and collaboration in the Arm HPC community by introducing the available technologies, methodologies, and resources for HPC developers interested in migrating their applications to Arm Neoverse. The first 25 minutes of this presentation will review of the state-of-the-art in supercomputer deployments and software applications, introduce HPC developer tools from Arm and the HPC community, and conclude with tips and tricks for porting high performance computing applications to Neoverse supercomputers. If 50 minutes are available for this presentation, we will also include tips and tricks for porting vectorized HPC applications to Arm’s Scalable Vector Extension (SVE) and introduce a performance quantification methodology for SVE based on the Arm Instruction Emulator (ArmIE). We will demonstrate how highly tuned HPC applications can be ported to SVE when those applications have made assumptions about the hardware vector width and discuss the performance implications of vector width agnostic (VLA) programming. The presentation will conclude by presenting community resources for HPC developers and extending an invitation to future community events.

Speakers
avatar for John Linford

John Linford

Principal Applications Engineer, Arm
John Linford is a principal applications engineer at Arm with extensive experience creating, using, supporting, and deploying high performance computing applications and technologies. His research interests include emerging computer architectures, compilers, code generation, performance... Read More →



Thursday September 26, 2019 12:00pm - 12:50pm PDT
Pacific Room (Keynote)
 


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