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Data Center [clear filter]
Monday, September 23

3:30pm PDT

SAN19-114 To control or not to control I/O?
Important stakeholders in the personal-OS arena have switched to the BFQ I/O scheduler, to endow their systems with a very low I/O latency. The story differs with enterprise systems tough. By controlling I/O with BFQ, these systems would reach a 5X-10X throughput boost. Nevertheless, almost all stakeholders still stick to uncontrolled I/O. For various reasons they fail to see the economic benefits that may follow from the above boost.

At the other end of the spectrum, Facebook seems to see these benefits so clearly that they have invested in the design and implementation of two brand new I/O controllers for Linux. The latter control, respectively, latency and bandwidth. And these are the two main goals of BFQ.

In this presentation we try to shed a light on this sort of controversial situation, by showing some performance figures. In
particular we show again (the poor) performance without I/O control, after which we compare the performance of these new controllers with that of BFQ.

avatar for Paolo Valente

Paolo Valente

Assistant professor, University of Modena and Reggio Emilia
Paolo Valente is an Assistant Professor of Computer Science at the University of Modena and Reggio Emilia, Italy, and a collaborator of the Linaro engineering organization. Paolo's main activities focus on scheduling algorithms for storage devices, transmission links and CPUs. In... Read More →

Monday September 23, 2019 3:30pm - 3:55pm PDT
Sunset IV (Session 2)

4:00pm PDT

SAN19-118 Reliability, Availability, and Serviceability (RAS) on ARM64 status
introduce the RAS architecture on AArch64, based on the ARMv8 RAS extensions, SDEI, MM Secure Patition and APEI, Sharing the latest update of the development.

avatar for Wei Fu

Wei Fu

Senior Software Engineer, Red Hat Software (Beijing) Co.,Ltd.
Enterprise Linux developer with industry/server experience in Linux kernel, driver ,BSP, system porting development, LAVA(Linaro Automation and Validation Architecture) and testing with LMP. Also expert in Firmware (U-boot/arm-trusted-firmware/UEFI/ACPI) and Linux kernel development... Read More →

Monday September 23, 2019 4:00pm - 4:25pm PDT
Sunset IV (Session 2)

4:30pm PDT

SAN19-120 Ceph tuning practice on aarch64 full HDD servers
As a unified distributed storage system, Ceph provides applications with object, block, and file system interfaces.
Considering TCO, we setup a full disks arm servers ( (11 HDDs + 1 SSD) / per node ), which offers an optimal balance of storage utilization, performance, and cost, may act as a reference design for future arm storage deployment.
This session introduces performance tuning practice on this cluster, is intended for storage architects, engineers who want to deploy Ceph storage on arm servers using proven best practices.

avatar for ker liu

ker liu

Senior Software Engineer, arm
Ker Liu is a Senior Software Engineer at Arm working on server landing team, and he ever worked for Lucent and Nokia. He has more than 11 years of software development and solution experiences, and has a deep understanding of storage and container technology. He got his master degree... Read More →

Monday September 23, 2019 4:30pm - 4:55pm PDT
Sunset IV (Session 2)
Tuesday, September 24

2:00pm PDT

LDCG- Server Architecture Office Hours in Developer Rooms (Palm III)
Open Hours @Developers Rooms is a time slot where the tech lead and the team are scheduled to be in there.

Teams Participating:

LDCG Server Architecture in Palm 3

Tuesday September 24, 2019 2:00pm - 3:00pm PDT
Developers Rooms
Wednesday, September 25

2:00pm PDT

LDCG- Cloud Office Hours in Developer Rooms (Palm III)
Open Hours @Developers Rooms is a time slot where the tech lead and the team are scheduled to be in there.

Teams Participating:

LDCG Cloud in Palm 3

Wednesday September 25, 2019 2:00pm - 3:00pm PDT
Palm 3 (Developer Room)
Thursday, September 26

8:30am PDT

SAN19-418 XRT - FPGA Acceleration Runtime API
XRT is open source FPGA/ACAP runtime environment developed by Xilinx and hosted on GitHub -- https://github.com/Xilinx/XRT. It provides abstractions for common hardware/software interactions like compiled program download, DMA operations, memory management, execution control, device management etc. The runtime provides unified API for PCIe acceleration devices and edge SoCs. This talk will provide an overview of XRT and describe its modular architecture.

avatar for Sonal Santan

Sonal Santan

Distinguished Engineer, Xilinx Inc
Sonal Santan has more than 20 years of industry experience. He has been working on Xilinx FPGA acceleration solution for last 5 years. Prior to that he worked on Xilinx mixed language simulator. Sonal has 16 approved US patents.

Thursday September 26, 2019 8:30am - 8:55am PDT
Pacific Room (Keynote)

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